AMD Athlon 6 Dokumentacja Pobierz pdf (Strona 32)

32 Product Errata

25759 Rev. 3.79 July 2009

Revision Guide for AMD Athlon™ 64 and AMD Opteron™ Processors

68 Disable DQS Hysteresis Bit Not Readable

Description

The DisDqsHys bit of the DRAM Config Low register (Dev:2x90[3]) is writeable and performs its

intended function, but it incorrectly always reads as zero to software.

Potential Effect on System

None expected. This bit is configured by BIOS and readability is not required.

Suggested Workaround

Perform writes to the DisDqsHys bit as appropriate for the system, disregarding the value read back.

Fix Planned

Yes

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AMD Athlon 6 Dokumentacja Strona 32