AMD Sempron 10 Dokumentacja Pobierz pdf (Strona 143)

Product Errata 143

Revision Guide for AMD Family 10h Processors

41322 Rev. 3.84 August 2011

625 SB-RMI Writes May Not Be Observed by Processor

Description

After a write using the APML SB-RMI interface to either the Inbound Message Registers

(SBRMI_x3[F:8]) or Software Interrupt Register (SBRMI_x40), the processor may observe the

previous contents (as if the write did not occur) when reading these same registers using the SBI

Address/Data registers (F3x1E8 and F3x1EC). The conditions under which this erratum may occur

requires that message-triggered C1E is enabled (F3xD4[13] = 1b, Clock Power/Timing Control

0[MTC1eEn]). The functionality of the SB-RMI interface is not otherwise affected.

Potential Effect on System

Software running on the processor is not able to properly receive messages from system management

software using the SB-RMI interface.

Suggested Workaround

None. In the event that system management software needs to communicate with software running on

the processor, an alternative mechanism should be used.

Fix Planned

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